Verilator
Hardware simulator in Developer tools
Free, fast SystemVerilog simulator that compiles hardware designs to C++, and people call it indispensable for larger designs. Its steep learning curve is the main caveat.
6 people recommended Verilator in Hacker News comments, 2 had mixed feelings and 1 criticized it, November 2025 to October 2026.
Summary written by Claude from 11 comments. It was written before the November 2026 recount, and 8 of those comments still count.
9 people gave an opinion
- recommend it
- 6
- mixed feelings
- 2
- warn against or regret it
- 1
The record
Recommended in 4 of 12 months
In 6 different threads.
- November 2025: not recommended
- December 2025: recommended
- January 2026: not recommended
- February 2026: not recommended
- March 2026: recommended
- April 2026: not recommended
- May 2026: not recommended
- June 2026: recommended
- July 2026: not recommended
- August 2026: not recommended
- September 2026: not recommended
- October 2026: recommended
Why it doesn’t carry the badge
- 6 people recommend itNeeds 10 or more, not met.
- 6 recommenders for every criticNeeds 2 to 1 or better, met.
- Recommended in 4 of 12 monthsNeeds 4 or more, met.
- Recommended in 6 threadsNeeds 5 or more, met.
- The biggest thread supplies 17% of its recommendersNeeds half or less, met.
The same rules apply to every product, and the badge can’t be bought. Mixed feelings count toward neither side. How the badge works
What people say about it
Reasons grouped from a sample of 8 of the 9 opinions about it, picked in proportion to how many people recommend it, have mixed feelings and criticize it. Each mark is one comment in the sample. Open a reason to read what they said.
Why people recommend it
Each mark is one comment
Faster than other simulators
“it was excellent, substantially faster than Yosys”
Comment from 21 Mar 2026 in “Verilator open-source SystemVerilog simulator” “It's faster than anything else, and it is free.”
Comment from 20 Dec 2025 in “Pure Silicon Demo Coding: No CPU, No Memory, Just 4k Gates” Great and indispensable for large designs
“Verilator (which is indispensable in larger designs”
Comment from 21 Dec 2025 in “Pure Silicon Demo Coding: No CPU, No Memory, Just 4k Gates” “Verilator is great though”
Comment from 6 Oct 2026 in “OpenTPU – An open-source AI accelerator, developed by AI”
What people warn about
Each mark is one comment
Steep learning curve, unhelpful parse errors
“Verilator's parse errors are not designed as a Verilog tutorial”
Comment from 17 Sep 2026 in “Everybody's Lost Their Minds” Occasional miscompilation
“I gave up on Verilator support in a previous company when we ran into a plain miscompilation.”
Comment from 17 Feb 2026 in “Can a Computer Science Student Be Taught to Design Hardware?”
What people said
8 of the 9 opinions about it, picked in proportion to the three counts, newest first. Each links to the original comment.
“Verilator is great though”
“Verilator's parse errors are not designed as a Verilog tutorial”
“Of course, there's a learning curve to all new tools, and Verilator has a pretty steep curve in particular…”
“it was excellent, substantially faster than Yosys”
“I gave up on Verilator support in a previous company when we ran into a plain miscompilation.”
“It is trivial, literally a day of work, to set up a build system and CICD environment using Verilator”
“Verilator (which is indispensable in larger designs”
“It's faster than anything else, and it is free.”
Counts come from 1,791,911 Hacker News comments labeled by Claude, November 2025 to October 2026, with data through October 31, 2026. Counts updated 2 Nov 2026. How we count. Report a mistake.